FIG. 1 shows a perspective external view of a semiconductor package 10 according to the prior art. Semiconductor package 10 includes leads 12 which extend outwardly from molded housing 14 of semiconductor package 10. Semiconductor package 10 is an example of a standard small outline surface mounted package which is adapted for surface mounting onto a substrate 5 (FIG. 4), such as a circuit board. Specifically, leads 12 have been adapted to include terminal ends 12a which can be received by conductive pads 7 (FIG. 4) on a substrate 5 (FIG. 4). Leads 12 thus serve to support a package on a substrate.
Leads 12 further serve as electrical connectors for the semiconductor device contained within molded housing 14. According to a well known design, a semiconductor device such as a power MOSFET can be disposed within molded housing 14 and electrically connected to other elements of a circuit through leads 12 once semiconductor package 10 is properly mounted on a substrate 5 (FIG. 4), such as a circuit board.
Referring now to FIG. 2, in a typical package containing a power MOSFET 16, a number of leads 12d are electrically connected to the drain electrode of power MOSFET 16, at least one lead 12s is electrically connected to the source electrode of power MOSFET 16, and at least one lead 12g is electrically connected to the gate electrode of power MOSFET 16.
Referring now to FIG. 3, in another prior art configuration eight leads may be used, rather than six leads. In the configuration shown by FIG. 3, the source electrode of power MOSFET 16 may be electrically connected to more than one lead 12s. 
The configurations shown by FIGS. 2 and 3 are typically referred to as dual in-line packages (DIPs). A dual in-line package includes one row of leads 12 disposed at one side of molded housing 14 and another row of leads 12 parallel to the first row at an opposing side of housing 14.
Referring now to FIG. 4, a semiconductor device, such as a power MOSFET 16, is electrically connected to the leads of the package in the following manner. Drain electrode 18 of power MOSFET 16 is electrically and mechanically connected to die pad 20 by a layer of conductive adhesive such as solder or a conductive epoxy, such as a silver loaded epoxy. In the configuration shown by FIG. 4, die pad 20 is integral with at least one lead 12d, which extends to the exterior of molded housing 14, whereby drain electrode 18 of power MOSFET 16 may be electrically connected to external elements such as conductive pads 7 on substrate 5, as is well known. In addition, source electrode 22 of power MOSFET 16 may be electrically connected to lead 12s by at least one wirebond 24. Specifically, wirebond 24 is bonded to wirebond pad 26 of lead 12s as is well known in the art. Although not shown, gate electrode 28 of power MOSFET 16 is electrically connected to a corresponding lead 12g (not shown) by a wirebond in the same manner as source electrode 22.
In the device shown by FIG. 4, power MOSFET 16 is arranged such that it faces the bottom of the package. That is, power MOSFET 16 is mounted on the bottom surface of die pad 20 facing bottom surface 15 of housing 14, i.e. the surface that would be closest to substrate 5 when semiconductor package 10 is mounted.
Referring to FIG. 5, according to another prior art arrangement, power MOSFET 16 may be mounted on the top surface of die pad 20 facing top surface 13 of housing 14, i.e. the surface that is farthest from substrate 5 when package 10 is mounted.
A semiconductor device, such as power MOSFET 16, generates heat when operating. The heat so generated must be extracted to maintain the proper operation of the semiconductor device. Basically, the more heat extracted, the closer is the semiconductor device to its rated maximum operating temperature. Adequate heat extraction is, therefore, necessary to maintain the proper operation of the semiconductor device in the package.
In the packages shown by FIGS. 4 and 5, die pad 20 is entirely enclosed within molded housing 14. As a result, the dissipation of heat from power MOSFET 16 is hindered. Other packages are known in which the die pad is exposed through the bottom surface of the molded housing. In such packages, the exposed surface of the die mounting pad is either in contact with the substrate, a heat spreader or a heatsink. While heat dissipation is improved in the packages of the latter type, the position of the exposed portion of the die pad (the bottom surface of the molded housing) is less than ideal for heat dissipation by convection. Moreover, exposing the die pad at the bottom of the molded housing restricts the size of the heat spreader or the heatsink that may be used in that a) the lateral space between the leads restricts the width of any heat spreader or heatsink, and b) the space between the bottom surface of molded housing 14 of the package and the substrate on which the package is mounted is limited. These restrictions limit the amount of heat which can be dissipated and thus indirectly limit the size and the rating of the semiconductor device which may be used.